Welcome to ITSW 2009
The 16th International Test Synthesis Workshop
March 23-25, 2009
Austin
The ITSW 2009 Best Student Paper awards go to:
Rudrajit Datta (UT-Austin), "Improving Memory ECC by Exploiting Unused Spare Columns"
and
Kanupriya Gulati (Texas A&M), "Fault Table Generation Using Graphics Processing Units"
Design-for-Test continues to be a challenge with shrinking time-to-market windows, shrinking device geometries and increasing transistor densities. International Test Synthesis Workshop (ITSW) is a premier forum designed to share and exchange ideas, issues and best practices on the implementation of Design-for-Test (DFT) features in today's complex ICs and System-on-a-Chip (SOC) designs.
The Program Committee invites you to present recent research results at the workshop. Apart from paper sessions, the workshop will include embedded tutorials, panel discussions, round tables and also a Best Student Paper award. Details of the workshop can be found by following the links on the left.
To stay up-to-date with last-minute announcements regarding the workshop, you can also subscribe to our mailing list (you can unsubscribe any time).
Key Dates
Abstract Submission January 14th, 2009 Acceptance Notification February 9th, 2009 Advance Registration March 11th, 2009 (deadline extended) Hotel Information
